An Assemble Language Simulator
Time Limit: 1 Second Memory Limit: 32768 KB
In this problem, you are asked to write a program to simulate the execution of a kind of assemble language. Here is the sample of the program:
In this kind of language, we have these assumptions:
a) You can only access registers in your program.b) Every register is a four-dimension vector.
c) For one piece of program, there're eight input register named t0 to t7 and one output register named oC0. Note that the names of all the registers are case sensitive. The input registers make no difference to the final result because here we do not need to use it.
d) There're 32 temporary registers named r0 to r31.
e) All the temporary will be initialized to {0.0, 0.0, 0.0, 0.0};
f) There're 32 invariable registers named c0 to c31. The registers must be declared at the first of a program and the format is like this: "def c3, 0.0, 1.0, 2.0, 3.0".
g) The program is in text format and for every line there is a sentence. It is either an invariable definition in point f or an instruction which will be executed.
h) Because of point b, so you can access every member of one register. The four-dimension of a register is named 'x', 'y', 'z', 'w' or 'r', 'g', 'b', 'a'. If you only want to access 'x'/'r', 'y'/'g' member of register 'r0', the format is 'r0.xy' or 'r0.rg'. You can change the order of the member identifier. It means it is legal for 'r0.yx', etc. In this case, the process order will be changed. This is called register modifier. If there's no modifier after the register name, it means every member of the register should be processed.
i) Every instruction will be executed on every member of the operational registers. Here is the instruction list:
Name | Description | Slots | Format | Note |
add | Add two vectors | 1 | add dst, src0, src1 | |
def | Define constants | 0 | def dest, v1, v2, v3, v4 | point f |
dp3 | 3-D dot product | 1 | dp3 dst, src0, src1 | dest.x = dest.y = dest.z = dest.w = (src0.x * src1.x) + (src0.y * src1.y) + (src0.z * src1.z); |
frc | Fractional component | 1 | frc dst, src | dest.x = src.x - (floor)src.x; It's the same for other members; |
mad | Multiply and add | 2 | mad dst, src0, src1, src2 | dest = (src0 * src1) + src2 |
max | Maximum | 1 | max dst, src0, src1 | dest.x=(src0.x >= src1.x) ? src0.x : src1.x; It's the same for other members. |
mov | Move | 1 | mov dst, src | dest = src; |
mul | Multiply | 1 | mul dst, src0, src1 | dest.x = src0.x * src1.x; It's the same for other members. |
In this list, 'slots' means how many cycles the processor will spend on executing an specified instruction. The target here is to predict the value that the output register oC0 for some short programs and calculate the slots one program needs.
Input
The input consists of several test cases. For each test case, there is a small program. There are a blank line after each test case. There's no blank line in one program and every sentence is ended by a semicolon. Assume that the grammar is always correct;
Output
For each short program, there will be an output line, which consists of four float point number, followed by an integer which means the total slots the program needs. The four float point number must be rounded to 0.001. The numbers are seperated by a space.
Sample Input
def c0, 0.0, 1.0, 2.0, 3.0; def c1, 1.0, 2.0, 3.0, 4.0; dp3 r0.x, c0, c1; dp3 r0.y, c0, c1.yzwx; dp3 r0.z, c0, c1.zwxy; dp3 r0.w, c0, c1.wxyz; mov oC0, r0; def c1, 0.2, 4.5, 56.2, 3.9; frc r0.x, c1.g; mul r0.y, c1.z, c1.x; max r0.z, c1.w, c1.x; mov r31.zywx, r0; mov oC0, r31;
Sample Output
8.000 11.000 6.000 5.000 5 0.000 11.240 0.500 3.900 5Submit
Source: ZOJ Monthly, October 2004